Boundary Scan (JTAG)
Boundary Scan (Jtag) is a digital test procedure for testing printed circuit boards and electronic assemblies. It is based on the IEEE 1149.x standard and uses an integrated test interface (Jtag) through which signals are fed into and read out from integrated circuits.
This allows connection errors such as open circuits, short circuits, or wiring errors to be detected—even without direct access to physical test points on the printed circuit board. Boundary scan is often used for highly integrated assemblies with low test point density, e.g., BGA or fine-pitch components.
In electronics manufacturing, boundary scan is often used to supplement In-Circuit Tests (ICT) and Functional Tests (Fct).
FAQ
Boundary scan is used to test printed circuit board connections, diagnose interconnect faults, and program and debug assemblies.
Boundary scan is often combined with In-Circuit Test (ICT) and Functional Test (Fct) or Flying Probe Tests to enable complete electrical testing of assemblies.
Typical faults include open connections, short circuits, incorrect wiring, or missing solder joints between integrated circuits.
Further terms
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